Senior Subsystem Design Engineer — RTL/IP

Arm is seeking a Staff Subsystem Design Engineer to lead RTL and IP integration across Arm architectures and AMBA protocols. You will design microarchitectures, develop subsystem specs, and collaborate with verification and implementation teams to deliver high-quality, power-aware designs.

The role requires 10+ years of RTL/subsystem experience, SystemVerilog proficiency, and strong communication. Hybrid working model in the UK with competitive salary range.